
2004 Microchip Technology Inc.
DS30491C-page 317
PIC18F6585/8585/6680/8680
REGISTER 23-54: BRGCON3: BAUD RATE CONTROL REGISTER 3
R/W-0
U-0
R/W-0
WAKDIS
WAKFIL
—
SEG2PH2(1) SEG2PH1(1) SEG2PH0(1)
bit 7
bit 0
bit 7
WAKDIS: Wake-up Disable bit
1
= Disable CAN bus activity wake-up feature
0
= Enable CAN bus activity wake-up feature
bit 6
WAKFIL: Selects CAN bus Line Filter for Wake-up bit
1
= Use CAN bus line filter for wake-up
0
= CAN bus line filter is not used for wake-up
bit 5-3
Unimplemented: Read as ‘0’
bit 2-0
SEG2PH2:SEG2PH0: Phase Segment 2 Time Select bits(1)
111
= Phase Segment 2 time = 8 x TQ
110
= Phase Segment 2 time = 7 x TQ
101
= Phase Segment 2 time = 6 x TQ
100
= Phase Segment 2 time = 5 x TQ
011
= Phase Segment 2 time = 4 x TQ
010
= Phase Segment 2 time = 3 x TQ
001
= Phase Segment 2 time = 2 x TQ
000
= Phase Segment 2 time = 1 x TQ
Note 1: Ignored if SEG2PHTS bit (BRGCON2<7>) is ‘0’.
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown